The multiplicative complexity of the three-bit low-half multiplier
Determine the exact multiplicative complexity (number of AND gates in XOR-AND circuits with unrestricted nonlinear reuse) of the three-bit low-half multiplier M3. Earlier SAT searches gave the value six; a structural, enumeration-free lower-bound proof was missing.
An explicit six-AND circuit gives the upper bound. The lower bound normalizes a putative five-gate circuit by its number of initial linear gates and excludes each case. The tools are derivatives along good directions, quadratic products, exterior-form and complementary-minor arguments, and extraction modulo a Boolean ideal. The theorem is formalized in Lean 4, with named finite-computation lemmas checking individual case steps.
MC(M3)=6 is proved by a hand-checkable structural argument. The Lean 4 proof is kernel-checked using only the axioms propext, Classical.choice and Quot.sound.
